An FPGA implementation of a Feed-Back Chaotic Synchronization for secure communications

Azzaz, Mohamed, Tanougast, Camel, Sadoudi, Said, Bouridane, Ahmed and Dandache, A. (2010) An FPGA implementation of a Feed-Back Chaotic Synchronization for secure communications. In: Communication Systems Networks and Digital Signal Processing (CSNDSP), 2010 7th International Symposium on. IEEE, Piscataway, NJ, pp. 239-243. ISBN 978-1-4244-8858-2

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Abstract

In this paper, we propose a hardware implementation of a Feed-Back Chaotic Synchronization (FCS) for designing a real-time secure symmetric encryption scheme. This proposed scheme allows for the design and implementation of real time synchronization between two embedded chaotic generators for secure communications. The implementation and experimental results mapped on two Xilinx FPGA Virtex technology platforms using two Lorenz three-dimensional continuous chaotic systems demonstrate the feasibility and the usefulness of this synchronization approach in terms of performance and hardware resources for embedded encryption systems.

Item Type: Book Section
Subjects: G400 Computer Science
Department: Faculties > Engineering and Environment > Computer Science and Digital Technologies
Depositing User: Becky Skoyles
Date Deposited: 26 Jan 2015 15:22
Last Modified: 10 Nov 2016 12:39
URI: http://nrl.northumbria.ac.uk/id/eprint/20526

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