Roy, Tushar Kanti, Mahmud, Md Apel and Roy, Naruttam Kumar (2022) An integral backstepping controller design for compensated distribution networks with rapid earth fault current limiters in bushfire prone areas. IET Generation, Transmission & Distribution, 16 (19). pp. 3928-3940. ISSN 1751-8687
|
Text (Advance online version)
gtd2.12576.pdf - Published Version Available under License Creative Commons Attribution 4.0. Download (13MB) | Preview |
|
|
Text (Final published version)
Final published version.pdf - Published Version Available under License Creative Commons Attribution 4.0. Download (13MB) | Preview |
Abstract
This paper presents a nonlinear integral backstepping controller (I‐BSC) design scheme for a T‐type residual current compensation (RCC) inverter used in compensated distribution networks with rapid earth fault current limiters (REFCLs). The major control task for the proposed scheme is to reduce the fault current to a value suitable for the mitigation of powerline bushfires due to single phase‐to‐ground faults in compensated distribution networks. The key distinct feature of the proposed I‐BSC over the traditional backstepping controller (T‐BSC) is that it introduces an integral action for analyzing the dynamic of the tracking error which minimizes its steady‐state value and ensures better dynamic performance. In order to prove the global asymptotic stability of the RCC inverter with the proposed integral backstepping controller (I‐BSC), the Lyapunov function‐based theory is used. Finally, the performance of the I‐BSC is analyzed on the MATLAB/Simulink environment and compared with a T‐BSC. The performance of both I‐ and T‐BSCs is assessed in terms of transient behaviors of the injected current to the neutral, fault current, and line‐to‐ground voltage of the faulty phase to ensure the standard operational criteria for self‐extinguishing powerline bushfires. Simulation results clearly demonstrate that both controllers fulfill operational standards for REFCL‐compensated networks though the I‐BSC archives better transient behaviors while comparing with the T‐BSC. Results from the processor‐in‐loop (PIL) validations are also included to further justify the applicability of the newly proposed scheme in the real‐time environment.
Item Type: | Article |
---|---|
Subjects: | H600 Electronic and Electrical Engineering H800 Chemical, Process and Energy Engineering |
Department: | Faculties > Engineering and Environment > Mathematics, Physics and Electrical Engineering |
Depositing User: | John Coen |
Date Deposited: | 08 Aug 2022 11:27 |
Last Modified: | 26 Sep 2022 13:45 |
URI: | https://nrl.northumbria.ac.uk/id/eprint/49764 |
Downloads
Downloads per month over past year